The present invention relates to an equalizer or reception system having an equalizer which updates a tap coefficient of the equalizer and a data in method and apparatus which convert the data format in order to perform D/A conversion on the data processed by a floating-point type digital signal processor.
Conventionally, a data modem performs data transmission through a public line, but its environment is not sufficient. That is, the public line is ordinary designed for audio transmission, therefore, there are various disadvantages for data communication. For example, a signal which goes through the line is influenced by hit, sudden level fluctuation, and impluse noise. This is not a problem in case of audio signal transmission, however, has enormous influence to data error rate in case of data communication.
For example, in a reception signal processing unit of a data modem based upon CCITT recommendation V. 27 ter, V. 29, traceability of an auto gain controller (AGC) is delayed purposely for stable demodulation during the data reception. Therefore, where a reception signal level is suddenly flucatuated, the gain of the AGC becomes an improper value, resulting in generation of errors in the demodulated signal. In the case where a hit or impulse noise is generated, since the reception signal contains the error, a correct demodulated signal cannot be obtained.
An adaptive equalizer, in particular, updates a tap coefficient by using the demodulated signal. If the demodulated signal is not correct, the tap coefficient also contains an error and equalization cannot be performed. Furthermore, an adaptive equalizer is not capable of resetting the tap coefficient during data reception and the operation cannot be properly performed until training data is received again. That is, a burst error occurs during this period. The above-described cases need to be avoided in the adaptive equalizer.
For the above reason, a data modem as shown in FIG. 8 detects fluctuations in the reception signal level by a level-fluctuation detector 13 in order to suspend updating the tap efficient of the adaptive equalizer.
However, in this level-fluctuation detector, there is a case where the level fluctuation cannot be detected even though the gain of the AGC is unstable. For example, when a demodulated signal (complex number) in which the absolute value is rather small sequentially appeared even if the reception signal level has been suddenly risen. Accordingly, there may be a case where the tap coefficient of the adaptive equalizer is updated because the level fluctuation is not detected before the gain of the AGC reaches a stable value after the reception signal has recovered from the hit.
When the period where the hit is occurring is longer than the tracing time of the AGC, the level of the demodulated signal recovers to an appropriate value even if the carrier is not contained in the reception signal. In this case, since the level fluctuation is not detected, the tap coefficient is updated by using the signal obtained from the demodulating white noise.
However, the above-described method using the level-fluctuation detector cannot cope with the hit sufficiently. Still remaining is the problem that equalization cannot be performed because the tap coefficient has been updated in accordance with a demodulated signal containing errors.
Recently, signal processing circuit for communication and control has been developed of digital circuit. There are the following advantages in this construction:
(1) The characteristics of the circuit does not rely on the accuracy of an element and is not effected by secular change; PA1 (2) Adjustment at production is not necessary; and PA1 (3) The circuit does not easily fluctuate with noise.
Furthermore, since capability of microprocessor has been improved, digital signal processing circuit can be constituted of software of a digital signal processor (DSP). It is possible to execute processing for a plurality of signals by a single device and processing which is suitable to an input signal. Furthermore, cost performance is improved and design change is easily performed.
When signal processing is performed by the DSP, the problem with operational error occurs. Floating-point type DSP is often used in order to minimize the influence from the operational error and obtain a wide dynamic range. To convert the digital signal processed by this DSP into an analog signal, first the data format needs to be changed from floating-point type data to two's complement type data, and then the D/A conversion is performed. Therefore, floating-point type DSP usually has an instruction to convert the floating-point type data to two's complement type data.
However, there is floating-point type DSP which, to reduce the cost, does not have the above instruction. The signal processing circuit using such a DSP needs to have additional hardware to convert the floating-point type data into two's complement type data which is provided between the DSP and D/A converter. Since this hardware is costly, the overall cost cannot be reduced.